Impact of Lot Dedication on the Performance of the Fab

Photolithography is the most complex of the operations involved in the fabrication of a wafer, and it requires the greatest precision. Photolithography is used to create multiple layers of circuit patterns on a chip. Traditionally, wafer fab operations, and in particular, those performed in the photolithography processing area, have always presented challenging scheduling and control problems. Some of the characteristics that make the photolithography processing area difficult to schedule are as follows: reentrant flow, unpredictable yield and rework time at critical operations, shared resources such as reticles, rapidly changing technologies, and lot dedication for steppers and scanners for critical layers. This processing area, where wafers are exposed using scanners or steppers, typically, comprises the bottleneck workstations. Also, the numbers of reticles available for a given layer of product type are limited. Consequently, it is important to develop appropriate schedules to ensure effective utilization of the tools involved. In this study, a manufacturing line that is used to produce four dynamic random access memory (DRAM) products, requiring approximately 240 stages with 18 photolithography layers, is considered. The problem we propose to investigate can concisely be described as follows: Given a set of products to be processed in a photolithography area consisting of steppers and scanners (tools), with each product requiring a specific reticle type, determine the sequence in which to process the lots on